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tda7348 digitally controlled audio processor input multiplexer - three stereo and one mono inputs - selectable input gain for optimal adaptation to different sources volume control in 0.3db steps in- cluding gain up to 20db zero crossing mute and direct mute pause detector with programmable threshold soft mute controlled by software or hardware pin bass and treble control four speaker attenuators - four independent speakers control in 1.25db steps for balance and fader facilities - independent mute function all functions programmable via se- rial i 2 cbus description the tda7348 is an upgrade of the tda7318 audioprocessor. thanks to the used bipolar/cmos technology, very low distortion, low noise and dc-stepping are obtained. due to a highly linear signal processing, using cmos-switching techniques instead of standard bipolar multipliers, very low distortion and very low noise are obtained several new features like softmute, zero-crossing mute and pause detector are implemented. the soft mute function can be activated in two ways: 1 via serial bus (bit d0, mute byte) 2 directly on pin 22 through an i/o line of the microcontroller very low dc stepping is obtained by use of a bicmos technology. september 2003 ? ordering number: tda7348 (dip28) tda7348d (so28) dip28 so28 1/14
14 13 11 l1 l2 l1 l2 l4 10 r1 r2 r1 r2 r4 9 input selector + gain left inputs right inputs supply 2 31 zero cross + mute soft mute out(l) in(l) 17 16 vol 1, 2 zero cross + mute vol 1, 2 bass bass treble treble 10 m f 7 out(r) cref in(r) 6 bout(l) bin(l) 19 18 bout(r) bin(r) 21 20 5 treble(r) spkr att mute spkr att mute spkr att mute spkr att mute treble(l) 4 24 28 27 25 26 23 out left front out left rear scl sda out right front out right rear d93au100a bus serial bus decoder + latches 3 x 1 m f c1 c2 c4 c6 c5 agnd v s c8 c10 2.2 m f c9 2.2 m f rb c11 47nf c12 100nf r1 4.7k c13 2.7nf c14 100nf c15 100nf c16 2.7nf r2 4.7k 15 csm rb csm 12 l3 c3 l3 r3 r3 8 c7 3 x 1 m f 22 sm block diagram tda7348 2/14
absolute maximum ratings symbol parameter value unit v s operating supply voltage 10.5 v t amb operating ambient temperature -40 to 85 c t stg storage temperature range -55 to 150 c thermal data symbol parameter dip28 so28 unit r th j-amb thermal resistance junction-pins 85 65 c/w quick reference data symbol parameter min. typ. max. unit v s supply voltage 6 9 10.2 v v cl max. input signal handling 2.1 2.6 vrms thd total harmonic distortion v = 1vrms f = 1khz 0.01 0.08 % s/n signal to noise ratio 106 db s c channel separation f = 1khz 100 db volume control -78.45 20 db treble control 2db step -14 +14 db bass control 2db step -10 +18 db fader and balance control 1.25db step -38.75 0 db input gain 3.75db step 0 11.25 db mute attenuation 100 db in(r) out(r) in r3 in r2 in r1 in l3 am mono in l2 in l1 1 3 2 4 5 6 7 8 9 csm in(l) out(l) bout(l) bin(l) bin(r) bout(r) sm out rr 23 22 21 20 19 17 18 16 15 d94au099 10 11 12 13 14 28 27 26 25 24 cref v s gnd l r out lr out rf out lf sda scl treble bus inputs bass pin connection tda7348 3/14
electrical characteristics (v s = 9v; r l = 10k w ; r g = 50 w ; t amb = 25 c; all controls flat (g = 0.3db step 0db); f = 1khz. refer to the test circuit, unless otherwise specified.) symbol parameter test condition min. typ. max. unit input selector r i input resistance 70 100 130 k w v cl clipping level d 0.3% 2.1 2.6 v rms s i input separation 80 100 db r l output load resistance 2 k w g i min minimum input gain -0.75 0 0.75 db g i max maximum input gain 10.25 11.25 12.25 db g step step resolution 2.75 3.75 4.75 db e n input noise 20hz to 20 khz unweighted 2.3 m v v dc dc steps adiacent gain steps 1.5 10 mv g imin to g imax 3mv volume control (1 + 2) r i input resistance 35 50 k w g max maximum gain 18.75 20 21.25 db a max maximum attenuation 78.45 db a stepc step resolution coarse attenuation 0.51.252.0 db a stepf step resolution fine attenuation (only volume 1) 0.11 0.31 0.51 db e a attenuation set error g = 20 to -20db -1.25 0 1.25 db g = -20 to -58db -3 2 db e t tracking error 2db v dc dc steps adiacent attenuation steps -3 0 3 mv from 0db to a max 0.5 5 mv zero crossing mute v th zero crossing threshold (note 1) win = 11 20 mv win = 10 40 mv win = 01 80 mv win = 00 160 mv a mute mute attenuation 80 100 db v dc dc step 0db to mute 0 3 mv soft mute a mute mute attenuation 45 60 db t don on delay time c csm = 22nf; 0 to -20db; i = i max 0.7 1 1.7 ms c csm = 22nf; 0 to -20db; i = i min 20 35 55 ms t doff off current v csm = 0v; i = i max 25 50 75 m a v csm = 0v; i = i min 1 m a v thsm soft mute threshold 1.5 2.5 3.5 v r int pullup resistor (pin 22) (note 2) 35 50 65 k w v smh (pin 22) level high soft mute active 3.5 v v sml (pin 22) level low 1 v tda7348 4/14
electrical characteristics (continued) symbol parameter test condition min. typ. max. unit bass control b boost max bass boost 15 18 20 db b cut max bass cut -8.5 -10 -11.5 db a step step resolution 1 2 3 db r g internal feedback resistance 45 65 85 k w treble control c range control range 13 14 15 db a step step resolution 1 2 3 db speaker attenuators c range control range 35 37.5 40 db a step step resolution 0.5 1.25 2.0 db a mute output mute attenuation data word = xxx11111 80 100 db e a attenuation set error 1.25 db v dc dc steps adjacent attenuation steps 0 3 mv audio output v clip clipping level d = 0.3% 2.1 2.6 vrms r l output load resistance 2 k w r o output impedance 30 100 w v dc dc voltage level 3.5 3.8 4.1 v general v cc supply voltage 6 9 10.2 v i cc supply current 10 15 ma psrr power supply rejection ratio f = 1khz 60 80 db b = 20 to 20khz "a" weighted 65 db e no output noise output muted (b = 20 to 20khz flat) 2.5 m v all gains 0db (b = 20 to 20khz flat) 515 m v e t total tracking error a v = 0 to -20db 0 1 db a v = -20 to -60db 0 2 db s/n signal to noise ratio all gains = 0db; v o = 1v rms 106 db s c channel separation 80 100 db d distortion v in = 1v 0.01 0.08 % bus inputs v il input low voltage 1 v v ln input high voltage 3 v i ln input current vin = 0.4v -5 5 m a v o output voltage sda acknowledge i o = 1.6ma 0.4 0.8 v note 1: win represents the mute programming bit pair d 6 , d 5 for the zero crossing window threshold note 2: internal pullup resistor to vs/2; "low" = softmute active r tda7348 5/14
figure 4: timing diagram of i 2 cbus figure 3: data validity on the i 2 cbus i 2 c bus interface data transmission from microprocessor to the tda7348 and viceversa takes place thru the 2 wires i 2 c bus interface, consisting of the two lines sda and scl (pull-up resistors to positive supply voltage must be externally connected). data validity as shown in fig. 3, the data on the sda line must be stable during the high period of the clock. the high and low state of the data line can only change when the clock signal on the scl line is low. start and stop conditions as shown in fig.4 a start condition is a high to low transition of the sda line while scl is high. the stop condition is a low to high tran- sition of the sda line while scl is high. a stop conditions must be sent before each start condition. byte format every byte transferred to the sda line must con- tain 8 bits. each byte must be followed by an ac- knowledge bit. the msb is transferred first. acknowledge the master ( m p) puts a resistive high level on the sda line during the acknowledge clock pulse (see fig. 5). the peripheral (audioprocessor) that ac- knowledges has to pull-down (low) the sda line during the acknowledge clock pulse, so that the sda line is stable low during this clock pulse. the audioprocessor which has been addressed has to generate an acknowledge after the recep- tion of each byte, otherwise the sda line remains at the high level during the ninth clock pulse time. in this case the master transmitter can gen- erate the stop information in order to abort the transfer. transmission without acknowledge avoiding to detect the acknowledge of the audio- processor, the m p can use a simplier transmis- sion: simply it waits one clock without checking the slave acknowledging, and sends the new data. this approach of course is less protected from misworking and decreases the noise immunity. figure 5: acknowledge on the i 2 cbus tda7348 6/14
msb lsb function x x x i a3 a2 a1 a0 0 0 0 0 input selector 0 0 0 1 volume 2 0 0 1 0 volume 1 0 0 1 1 bass, treble 0 1 0 0 speaker attenuator lf 0 1 0 1 speaker attenuator lr 0 1 1 0 speaker attenuator rf 0 1 1 1 speaker attenuator rr 1000mute auto increment if bit i in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled subaddress (receive mode) chip address subaddress data 1 to data n msb lsb msb lsb msb lsb s1000100r/w ack x x x i a3 a2 a1 a0 ack data ack p ack = acknowledge s = start p = stop i = auto increment x = not used max clock speed 500kbits/s transmitted data send mode msb lsb xxxxxsmzmx zm = zero crossing muted (high active) sm = soft mute activated (high active) x = not used the transmitted data is automatically updated after each ack. transmission can be repeated without new chipaddress. software specification interface protocol the interface protocol comprises: a start condition (s) a chip address byte,(the lsb bit determines read/write transmission) a subaddress byte. a sequence of data (n-bytes + acknowledge) a stop condition (p) tda7348 7/14
data byte specification x = not relevant; set to "1" during testing msb lsb function d7 d6 d5 d4 d3 d2 d1 d0 x x 1 0 0 0 not used x x 1 0 0 1 in 2 x x 1 0 1 0 in 1 x x 1 0 1 1 am mono x x 1 1 0 0 not used x x 1 1 0 1 in 3 x x 1 1 1 0 not allowed x x 1 1 1 1 not allowed x x 1 0 0 11.25db gain x x 1 0 1 7.5db gain x x 1 1 0 3.75db gain x x 1 1 1 0db gain for example to select the in 2 input with a gain of 7.5db the data byte is: x x 1 0 1 0 0 1 input selector msb lsb function d7 d6 d5 d4 d3 d2 d1 d0 xxx10000 0db xxx10001 -1.25db xxx10010 -2.5db xxx10011 -3.75db xxx10100 -5db xxx10101 -6.25db xxx10110 -7.5db xxx10111 -8.75db xxx11000 -10db xxx11001 -11.25db xxx11010 -12.5db xxx11011 -13.75db xxx11100 -15db xxx11101 -16.25db xxx11110 -17.5db xxx11111 -18.75db for example to select -17.5db attenuation the data byte is: x x x1 1 1 1 0 volume 2 tda7348 8/14
msb lsb function d7 d6 d5 d4 d3 d2 d1 d0 1 soft mute on 0 1 soft mute with fast slope (i = i max ) 1 1 soft mute with slow slope (i = i min ) 1 direct mute 0 1 zero crossing mute on 00 zero crossing mute off (delayed until next zerocrossing) 1 zero crossing mute and pause detector reset 0 0 160mv zc window threshold (win = 00) 0 1 80mv zc window threshold (win = 01) 1 0 40mv zc window threshold (win = 10) 1 1 20mv zc window threshold (win = 11) 0 nonsymmetrical bass cut (note 4) 1 symmetrical bass cut an additional direct mute function is included in the speaker attenuators. note 4: bass cut for very low frequencies; should not be used at +16 and +18db bass boost (dc gain) mute msb lsb speaker attenuator lf, lr, rf, rr d7 d6 d5 d4 d3 d2 d1 d0 1.25db step xxx 0 0 0 0db x x x 0 0 1 -1.25db xxx 0 1 0 -2.5db x x x 0 1 1 -3.75db xxx 1 0 0 -5db x x x 1 0 1 -6.25db xxx 1 1 0 -7.5db x x x 1 1 1 -8.75db 10db step xxx0 0 0db xxx0 1 -10db xxx1 0 -20db xxx1 1 -30db xxx11111 speaker mute for example an attenuation of 25db on a selected output is given by: x x x1 0 1 0 0 speaker attenuators tda7348 9/14
msb lsb function d7 d6 d5 d4 d3 d2 d1 d0 treble step 0 0 0 0 -14db 0 0 0 1 -12db 0 0 1 0 -10db 0011 -8db 0100 -6db 0101 -4db 0110 -2db 0111 0db 1111 0db 1110 2db 1101 4db 1100 6db 1011 8db 1010 10db 1001 12db 1000 14db bass steps 0 0 1 0 -10db 0011 -8db 0100 -6db 0101 -4db 0110 -2db 0111 -0db 1111 -0db 1110 2db 1101 4db 1100 6db 1011 8db 1010 10db 1001 12db 1000 14db 0001 146b 0000 18db for example 12db treble and -8db bass give the following data byte: 0 0 1 1 1 0 0 1 bass/treble tda7348 10/14
msb lsb function d7 d6 d5 d4 d3 d2 d1 d0 0.31db fine attenuation steps 0 0 0db 0 1 -0.31db 1 0 -0.62db 1 1 -0.94db 1.25db coarse attenuation steps 0 0 0 0db 0 0 1 -1.25db 0 1 0 -2.5db 0 1 1 -3.75db 100 -5db 1 0 1 -6.25db 1 1 0 -7.5db 1 1 1 -8.75db 10db gain / attenuation steps 0 0 0 20db 0 0 1 10db 010 0db 0 1 1 -10db 1 0 0 -20db 1 0 1 -30db 1 1 0 -40db 1 1 1 -50db for example to select -47.81db volume the data byte is: 1 1 0 1 1 0 0 1 power on reset: all bytes set to 1 1 1 1 1 1 1 0 volume 1 purchase of i 2 c components of sgs-thomson microlectronics, conveys a license under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specifications as defined by philips. tda7348 11/14
dim. mm inch min. typ. max. min. typ. max. a1 0.63 0.025 b 0.45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 d 37.34 1.470 e 15.2 16.68 0.598 0.657 e 2.54 0.100 e3 33.02 1.300 f 14.1 0.555 i 4.445 0.175 l 3.3 0.130 dip28 outline and mechanical data tda7348 12/14
so28 dim. mm inch min. typ. max. min. typ. max. a 2.65 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 c 0.5 0.020 c1 45 (typ.) d 17.7 18.1 0.697 0.713 e 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 f 7.4 7.6 0.291 0.299 l 0.4 1.27 0.016 0.050 s8 (max.) outline and mechanical data tda7348 13/14
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the cons equences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this p ublication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2003 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia C belgium - brazil - canada - china C czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com tda7348 14/14

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